1. Field of the Invention
The invention relates to a substrate, and more particularly to an ESD protection substrate.
2. Description of the Related Art
During an electrostatic discharge (ESD) event, large transient voltage and voltage are generated. When the ESD event occurs, the peak voltage is approximately 25 KV and the peak current is approximately 100 A. FIG. 1 is a schematic diagram of an ESD pulse. During an ESD event, if the discharge current passes through circuit elements, transient damage or permanent damage to the circuit elements will occur for affecting the circuit. To operate the circuit normally and increase manufacturing yield, the circuit must comprise ESD protection.
FIG. 2 is a schematic diagram of a conventional substrate. The conventional method dopes conductor particles or semiconductor particles in the dielectric (FR-4) of a printed circuit board (PCB) for forming a voltage variable material (VVM) substrate. Assuming the top-surface of the substrate 20 transmits signals and the bottom-surface of the substrate 20 is grounded. In normal operations, the VVM serves as an insulator for providing high impedance. Thus, the top-surface of the substrate 20 normally transmits signals. When an ESD event occurs on the top-surface of the substrate 20, the VVM provides low impedance. Thus, the discharge current is quickly released to grounding. However, when the ESD event does not occur, the loading effect is higher due to the VVM.